VHDL Code for Comparator (4 bit)

Q. How do I write VHDL code for 4 bit Comparator
Ans:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity comp1 is
Port ( A : in STD_LOGIC_VECTOR (3 downto 0);
B : in STD_LOGIC_VECTOR (3 downto 0);
less : out STD_LOGIC;
equal : out STD_LOGIC;
greater : out STD_LOGIC);
end comp1;
architecture Behavioral of comp1 is
begin
process(A,B)